Ultra-low power bulk-biased mixer with current-reuse

Using the approaches of folded switching stage and self-biased transconductance stage, a mixer operating at supply voltage down to 0.6V was designed. The bulk-biased topology was used to achieve ultra-low supply voltage and ultra-low power consumption while the current-reuse technique was selected to increase gain, linearity and noise performance. Implemented in a SMIC 0.18μm CMOS process, the mixer core has an area of 460μm×400μm. When the frequency of the radio frequency (RF) signal, local oscillator (LO) signal and the intermediate frequency (IF) signal are 1575MHz, 1400MHz and 175MHz, respectively,the simulation results show that the mixer features a conversion gain of 6.1dB, a dual sideband (DSB) noise figure of 14dB, a 1dB compression point of -16.67dBm, and consumes only 0.76mW.